Senior Engineer Analog Layout

In your new role you will:Participate in block/IP floor planning from scratch, performing routing & layout verification (such as LVS, DRC, Antenna & others) and troubleshooting the results.Conduct thorough layout design reviews internally & external review with circuit designersExtensive use of CAD tools (Cadence Virtuoso--VXL & Mentor Calibre) in IP/chip integration and verificationCapable in guiding/coaching junior engineers for on time delivery & qualityYou are best equipped for this task if you have:Bachelor's Degree in Electrical/Electronic Engineering/Physics with VLSI exposure or equivalent 4 to 6 years of job experience in layout design field is preferred.Hands-on experience in analog layout from scratch, implementation of analog layout techniques, IR drop/EM analysisDeep understanding of analog circuit layout concepts in submicron CMOS technologiesPossess strong technical, analytical & problem-solving skills in layout designAbility to work as strong team player and participate in cross-functional activitiesGood interpersonal, verbal and communication skill with good initiative at work