In your new role you will: Work with an experienced engineer and develop memory subsystem based on AHB or AXI interconnect protocol using Verilog/System Verilog Work with an experienced engineer and develop high speed serial interfaces with SDR and DDR protocol using FPGA resources Follow a test plan, develop Verilog or C based test case, execute and report test results Maintain simulation env based on Verilog and C, perform modification based on change in requirements, target device RTL etc Participate in continuous improvement process and leverage the capabilities of the latest FPGA technology to ensure quality and faster time to market You are best equipped for this task if you have: Knowledge on embedded system with ARM CPU Knowledge on Verilog RTL design, verification, coverage analysis Knowledge on C or similar low-level programming language Experience with regression test bench & test suit development, debug Knowledge on Xilinx or Altera based FGPA design, implementation, and testing.
Experience with design methodology tools such as (or equivalent) Vivado, Questa, Oscilloscope, Logic Analyzer Able to write synthesizable RTL, integrate hard IP, Soft IP and create FPGA based design Must have strong teamwork and communication skills, passion, productivity, and self-learning ability #WeAreIn for driving decarbonization and digitalization.
As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT.
Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals.
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