Ai Ip & System Engineer

Develop and enhance AI accelerator IP, includes microarchitecture definition, RTL design and coding, white box testing and verification.
System-level design with integrated AI accelerator IP for proof-of-concept (POC) design and AI solutions deployment.
IP packaging, regression and release along with FPGA IDE tool.
Skills & Knowledge :
RTL logic design using Hardware Description Language (HDL) such as Verilog or System Verilog.
RTL logic verification (whitebox) using testbench.
Excellent English communication skill, both written and verbal.
Education & Experience :
Bachelor (or higher) degree in Electrical Engineering, Computer Engineering, or comparable disciplines.
Strong hands-on experience in IP and/or system design and debugging flow.
Experience in FPGA system design with embedded processor (preferred).
More than 5 years of working experience in IP logic and/or System design on FPGA/ASIC.#J-18808-Ljbffr