Design Verification Director

Design Verification Director
Company:

Lattice Semiconductor


Details of the offer

Overview There is energy here…energy you can feel crackling at any of our international locations.It's an energy generated by enthusiasm for our work, for our teams, for our results, and for our customers.Lattice is a worldwide community of engineers, designers, and manufacturing operations specialists in partnership with world-class sales, marketing, and support teams, who are developing programmable logic solutions that are changing the industry.Our focus is on R&D, product innovation, and customer service, and to that focus, we bring total commitment and a keenly sharp competitive personality.Energy feeds on energy.If you flourish in a fast paced, results-oriented environment, if you want to achieve individual success within a "team first" organization, and if you believe you can contribute and succeed in a demanding yet collegial atmosphere, then Lattice may well be just what you're looking for.Responsibilities & Skills Lattice is seeking candidates for the position of Director, Design Verification.This position gives you an opportunity to be a part of one of the most cutting edge and key projects that Lattice's R&D team has embarked upon to date.As part of our team, you will have the opportunity to take the lead on and contribute to verifying complex FPGAs.This position requires someone comfortable in all areas of FPGA design verification.Someone that thrives in a dynamic multi-functional organization and is not afraid to take on challenges and solve complex problems using state of the art methodologies.Accountabilities:Serve as the one of key leader in the Design Verification (DV) team Drive DV strategy for the site including building out the team; developing key DV capabilities; and most importantly, forming a collaborative, cohesive, and highly performant culture.Assume full ownership for FPGA design verification in Penang and assume stewardship for design verification tasks in Penang.Drive a quality and execution mindset throughout the organization.Adopt design verification flows and methodologies from established sites as "copy-exact" but be willing to drive improvements and fixes as opportunities arise.Develop strong relationships with teams located in different countries to enable work styles including:Supporting FPGA programs at other sitesAs needs require, either handing off or picking up programs across sitesMentor and develop a strong team.Willingness to travel to worldwide sites occasionally as needed.Required SkillsBS/MS/PhD Electrical Engineering, Computer Science, Computer Systems Engineering, or equivalent degree20+ years of experience leading teams towards successful tape out of commercial silicon products, managing team schedules and deliverables, and meeting product milestones.Advanced knowledge of System Verilog and UVM methodology Experience in using programming languages such as C/C++, Perl/Python/Tcl for automatic the DV tasks.Hands-on verification experience in verifying IPs using AMBA bus architecture in UVM environment.Hands-on verification experience in verifying the firmware used for SOC functions.In-depth knowledge and experience working with low power design, UPF integration, boot-up, power-cycling, HW/FW interaction verification.Expert in creating IP level module and sub-system verification plans, TBs, portable test benches, sequences, verification infrastructure.Expert in developing UVM based highly reusable test benches and integrate complex multi-instance VIPs, sub-system test benches and verification suites at SOC level and achieve targeted coverage.Proven record of working with design, architecture, SW, FW, and IP delivery teams to efficiently integrate and verify overall FPGA design.Embraces and thrives in ambiguity, changing priorities.Familiar with FPGA designs, use-cases, and design verification considerationsFamiliar with SOC designs, use-cases, and design verification considerationsProven ability to work with multiple groups across different sites located in different time zones.A great team leader with excellent communication and problem-solving skills and the desire to seek diverse challenges.Benefits Competitive benefits package including:Medical (HMO), dental, vision effective on date of hireEmployee Stock Purchase Plan, Well-being Programs, Tuition Reimbursement and more


Source: Talent_Ppc

Job Function:

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Design Verification Director
Company:

Lattice Semiconductor


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