Job Description In your new role you will: Perform routine assignments of basic cell/block layouts with limited scope to verify digital periphery sub blocks with a given floor plan and assists other Layout engineers in completing tasks.
Acquires job skills, learns and practices Infineon layout flow and methodologies.
Perform physical verification both at block level and full chip level with some guidance from senior layout engineers.
The work is designed to develop the professional knowledge and ability of the individual.
Has little or no role in decision making, executing on plans or projects assigned by their direct manager.
Your Profile You are best equipped for this task if you have: Work experience: 0-2 years Technical / functional experience: 0-1 year Language and software skills + level: Cadence Virtuoso, Unix Education background: Degree #WeAreIn for driving decarbonization and digitalization.
As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT.
Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals.
Be a part of making life easier, safer and greener.
Are you in?
We are on a journey to create the best Infineon for everyone.
This means we embrace diversity and inclusion and welcome everyone for who they are.
At Infineon, we offer a working environment characterized by trust, openness, respect and tolerance and are committed to give all applicants and employees equal opportunities.
We base our recruiting decisions on the applicant´s experience and skills.
Please let your recruiter know if they need to pay special attention to something in order to enable your participation in the interview process.