Graduate Talent (Mixed-signal validation)ISCP MIP MYS is seeking a mixed-signal design engineer to join our talented and vibrant team.
You will be directly involved in delivering next-generation DDR PHY designs for SOC applications on Intel's leading process node.
Key Responsibilities:
Develop a Mixed-Signal Validation (MSV) testbench in accordance with the specified requirements.
Own MSV for Custom Building Blocks (CBB) covering open loop functional checks, closed-loop functional checks with RTL blocks, PHY level features, high volume manufacturing (HVM) features, and closed-loop with Memory Reference Code (MRC) checks.
Independently analyze results based on specification documents and debug the root cause of failures.
Participate in MSV result review and collaborate with designers.
Qualifications:
Bachelor's or Master's degree in Electronics Engineering or related fields with a minimum CGPA of 3.0.
Education focus should include integrated circuit design or RTL design.
Highly analytical team player with a strong interest in debugging and problem-solving.
Strong written and oral communication skills.
Ability to operate independently and thrive in high-pressure, demanding environments.
Job Type:Intel Contract Employee
Shift:Shift 1 (Malaysia)
Primary Location:Malaysia, Penang
Additional Locations:
Business Group:The Client Computing Group (CCG) is responsible for driving business strategy and product development for Intel's PC products and platforms, spanning form factors such as notebooks, desktops, 2 in 1s, and all-in-ones.
As the largest business unit at Intel, CCG is investing more heavily in the PC, ramping its capabilities even more aggressively, and designing the PC experience even more deliberately, including delivering a predictable cadence of leadership products.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust:
N/A
Work Model for this Role:
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
* Job posting details (such as work model, location, or time type) are subject to change.#J-18808-Ljbffr