Job DescriptionAs a Physical Design Tool Flow Methodology (TFM) Design Automation (DA) Engineer, the job responsibilities cover the following:
Conceptualizes, documents, and designs tools, flows, and methods (TFM) for use in the physical design implementation of IPs, SoCs, and the interaction/handoff/reuse between IPs and SoCs.
Establishes regression flows, drives improvement in RTL to GDS flows, and creates and implements methodologies for improving robustness, power, performance, area, and timing for optimizing physical design constraints.
Develops new physical design techniques through innovative scripts, checkers, flows, and other CAD based automation to simplify and expedite the design process.
Analyzes retrospective data on current generation quality and efficiency gaps to identify proper incremental, evolutionary, or transformative changes to the existing physical design related TFM.
Partners with physical design, circuits, CAD, RTL, tool/flow owners, and third party vendor teams to continuously improve physical design methodologies and efficiencies.
QualificationsYou must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your school work/classes/research and/or relevant previous job and/or internship experiences.
Minimum Qualifications:
Candidate must possess a degree in Electrical Engineering, or Computer Engineering.
Bachelor's with 1+ years or Master's experience in the following: VLSI design with the typical RTL-APR flow such as: RTL, simulation, validation, synthesis, APR, extraction, timing/characterization.
Debugging of Synopsys or Cadence digital design tools and flows such as: FusionCompiler, PrimeTime, Innovus, Tempus, etc.
Strong coder with proven background of writing automation scripts and programs, such as Unix or shell scripting, TCL, Perl or Python.
Expertise in finding ways to 'work around' issues in design flows.
Inside this Business GroupAs the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth.
Posting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
BenefitsWe offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefitshere.
Working ModelThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.#J-18808-Ljbffr