WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world.
Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded.
Underpinning our mission is the AMD culture.
We push the limits of innovation to solve the world's most important challenges.
We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
THE ROLE:
Post-silicon validation has become an important role to verify chip function nowadays.
The post-silicon validation team owns many peripheral standard IP's silicon bring-up/validation, such as PCIe/USB/ESPI/I2C/I3C.
As a Systems Engineer of IPSE, you will own post-silicon bring-up and feature enablement of AMD internal IPs for AMD SOC projects.
THE PERSON:
You will be responsible for developing and executing the IP-level bring-up and feature validation plans, attempting to reproduce, triage, and debug all silicon issues.
KEY RESPONSIBILITIES:
Define and maintain the feature list.
Define and execute the overall PCIe/USB IP features test plan and post-silicon verification strategy, including required tools/scripts development.
Debug PCIe/USB IP issues found during bring-up, validation, and production phases of SOC programs, focusing mainly on dense server projects.
Engage with post-silicon IP enablement efforts and join technical discussions to drive resolution on technical issues.
Demonstrate IP End-to-End ownership.
PREFERRED EXPERIENCE:
In-depth knowledge of PC architectures, particularly in PCIe/USB/ESPI/I2C/I3C protocols.
Strong self-learning capability, individual analysis, hands-on working, and problem-solving skills.
Strong hardware experience with board design and onboard debugging skills.
Good communication skills and proficiency in English reading/writing.
Preferred strong programming/scripting skills (e.g., C/C++, Python, Perl, Ruby, Assembly).
Understanding of Verilog coding or DV simulation environment.
Software experience with operating systems, kernel, BIOS is a plus.
ACADEMIC CREDENTIALS:
MSEE or BSEE with 10 to 15 years of experience in digital ASIC/SOC design.
Must have first-hand bring-up or debug experience: 10+ years on post-silicon or IP/platform board validation.
LOCATION:
Penang, Malaysia
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