In your new role you will: VLSI component layout and translation of schematics into layout geometry Participate in module/chip floor planning, performing layout verification (such as LVS, DRC, Antenna & others) and troubleshooting the results.
Extensive use of CAD tools (Cadence Virtuoso--VXL & Calibre) in chip assembly and verification Perform block level/full chip verification check and fixes You are best equipped for this task if you have: Bachelor's Degree in Electrical/Electronics Engineering, Bachelor's Degree in Physics with VLSI exposure or equivalent with around 6-12 years of job experience in layout design field is preferred.
Excellent communication skills and good initiative at work.
Possess strong analytical skills.
Ability to work with multiple groups as a team member.
Knowledge in VLSI Layout Design, IO Layout Design and understanding of geometrical design rules will be an added advantage.
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