In your new role you will:Lead a team of experts responsible for SiC and GaN substrate and Epiblock in the frontend wafer fab covering Process Integration, Defect Density and Yield engineeringfunctions.Support ramp of high-volume manufacturing and ramp-up of Infineon's cold split technology.Optimize the process block comprising of boule splitting process, post-splitting processing and Epi process as per product requirements.Support high volume ramp of Wide Band Gap Epi manufacturing by implementing health of line monitoring and fast feedback mechanism to ensure stable performance.Analyse the Defects originating from substrates and epi process block and drive for improvement with Unit process engineering teams.Establish correlations between inline defect density scan with electrical parameters, yield, and reliability of products.Establish the Defect monitoring plan, out-of-control action plans, and defect density targets.Establish Defect Pareto and carry out defect characterization and killing ratios.Drive continuous Defect Density baseline improvements and substrate/epi-to-product interactions.Conducts defect learning for existing and new technologies and products to establish the impact of defects on yield, reliability, and cosmetic appearance.Improves yield (YFE) by reducing DD-related yield loss. Work with WBGPI and PTE/PE and UPD DD and Production wafer inspection teams to achieve the best performance of technologies and products.Provide input for SiC boules and substrate suppliers for quality improvement programs.Ensure process windows and implement limits for inline and tools/advance process control parameters to achieve early detection and excursion-free manufacturing.Ensure flawless process/tools change management for the technologies and products under responsibility.Support deviation management by defect assessment of affected material.Cost, quality, stability, and productivity improvement of the complete block.Interact and communicate effectively with Process Integration and Product Engineers related to products which use the substrates and epiwafers supplied.Act as an interface between substrate and Epi manufacturing site and substrate user sites.You are best equipped for this task if you have:Overall 10+ years of experience in the semiconductor industry in any of the functions like Process Integration, Product Engineering, Defect Density, Substrate manufacturing, Epi Processes and yield engineering in the frontend wafer fab or wafer/Epi manufacturing environment.Strong know-how of Unit Processes, Process Integration, Device Physics and Process-Device interactions.Familiar with Technology and Product Transfers and Qualification methodologiesExperience of ramping up technologies in high volume and New Products IntroductionExperienced with quality and reliability requirements of Automotive and Industrial products.Working knowledge of Wafer Fab Tools and Processes, High-volume Manufacturing Systems, Quality and Reliability requirements, and Failure AnalysisFamiliar with Change and Deviation management and problem-solving methodologies.Must be a self-starter who can work both independently and in groups.Able to lead, organize and coordinate multiple projects in a timely manner.Ability to work with multiple teams and interfaces in a highly demanding, time-critical and agile environment.BenefitsCoaching, mentoring networking possibilitiesWide range of training offers & planning of career developmentInternational assignmentsDifferent career paths: Project Management, Technical Ladder, Management & Individual ContributorFlexible working conditionsHoliday child careMedical coverageOn-site social counselling and works doctorHealth promotion programsOn-site gym, jogging paths, beachvolleyball, tennis & soccer courtOn-site canteenPrivate insurance offersFlexible transition into retirement
