Staff STA Design Automation Engineer page is loaded Staff STA Design Automation Engineer Apply locations Malaysia, Penang time type Full time posted on Posted 2 Days Ago job requisition id JR0262785 Job Details: Job Description: In Q4 2023, Intel announced Altera will be reported as a separate business unit beginning on January 1, 2024 with ongoing support from Intel. This position is associated to that standalone business strategy and is expected to fully transition to a standalone company at some time in the future. Altera, an Intel Company is the industry-leading custom logic solutions to customers since inventing the world's first FPGA reprogrammable logic device in 1984. Join us in developing new technology to provide Intel with a competitive advantage in programmable solutions. If you find it exciting to work in a diverse team that innovates with other Intel advanced technology groups, with other industry leaders, and in academia, then we have your opportunity.
In this position, we are looking for a phenomenal engineer to join our world class engineering team to expand the technology that provides us with advantages in programmable solutions.
Job Responsibilities: To provide technical leadership on the current and next generation FPGA/SOC Timing Modeling and Static Timing Analysis (STA) flow methodology development. Defining, implementing and improving the state-of-the-art design solutions (EDA tool, flow and methodology) by sourcing externally or developing the solutions internally. Collaborate on HW/SW co-design for next-generation FPGA architectures and timing modeling techniques. Innovate and drive improvements for performance and features for production FPGA devices. Develop in-house algorithms, scripts, programs to support design activities, EDA tools technology infrastructure setup, CAD wrappers, GUIs, EDA tools customization and automation program. Providing consultation and EDA tools support to the multiple projects in the area of STA, ECO, timing modeling and timing closure. Qualifications: Requirements: BSEE/MSEE or equivalent in with minimum of 10 years experience in IC Design or Design Automation. Experience in industry Static Timing Analysis (STA), ECO and Timing Closure flow. Thorough knowledge in concepts like Crosstalk, On-Chip-Variation is required. Hand on experience in ASIC/SoC design flows and adjacent methodology development/support is required. Experience in advanced process 10nm and below will be plus. Programming knowledge in Perl, Python, Tcl/Tk, C-shell or other software languages. Proven leadership skills for collaborative cross-functional project. Job Type: Experienced Hire Shift: Shift 1 (Malaysia) Primary Location: Malaysia, Penang Additional Locations: Business group: The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential. Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs. Similar Jobs (5) Staff ASIC Design Automation Engineer locations Malaysia, Penang time type Full time posted on Posted 2 Days Ago Design Automation Engineer locations Malaysia, Penang time type Full time posted on Posted 30+ Days Ago EDA Design Flow Infrastructure Engineer locations Malaysia, Penang time type Full time posted on Posted 17 Days Ago Intel provides reasonable accommodation to applicants and employees. For more information on our Reasonable Accommodation process, please click here .
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