Senior Mixed Signal Validation Engineer

Senior Mixed Signal Validation Engineer
Company:

Intel Corporation


Details of the offer

Job DescriptionCEG HIP MYS is seeking senior mixed-signal design engineers to join our talented and vibrant team.You will be directly involved in delivering next-generation LPDDR5/DDR5 PHY designs for SOC application on Intel leading process node.Key Responsibilities include but not limited toDevelop a Mixed-Signal Validation (MSV) testbench in accordance with the specifiedrequirements.Own MSV for Custom Building Blocks (CBB) which covering open loop functional checks,closed-loop functional checks with RTL blocks, PHY level features, high volumemanufacturing (HVM) features, closed-loop with Memory Reference Code (MRC) checks.Independently analyze the result based on specification documents and debug the rootcause of the failures.Participate in MSV result review and collaborate with designers.Own equivalence check for analog blocks for both schematic and Behavioral Model (BMOD).QualificationsQualifications Good understand on design of high-speed analog and mixed-signal design, architecture,systemand integration aspects for DDR PHYs Good Understanding of to LPDDR/DDR JEDEC specifications and related DDR ProtocolsExperience with industry standard tools for Analog design such as Primsim XA, CadenceADE, Custom Waveview etc.Basic knowledge in programming language such as Phyton or PerlCross-discipline knowledge in any of these areas, such as Analog integration, RTL/SystemVerilog, Memory IO training, MRC and HAS/MAS specification documentation.Strong written and oral communication skillsBachelor's in Electronics and Electrical with 5+ years relevant experience or Master's with 3+ years relevant experiencerequired.Education Focus should include integrated circuit design or RTL design.Posting StatementAll qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.BenefitsWe offer a total compensation package that ranks among the best in the industry.It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation.Find more information about all of our Amazing Benefits here.Working ModelThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.In certain circumstances the work model may change to accommodate business needs.


Source: Talent_Ppc

Job Function:

Requirements

Senior Mixed Signal Validation Engineer
Company:

Intel Corporation


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