Curious about how Intel designers enable test and debug capabilities on our chips?
Join Our Malaysia Design Center Chipsets Design Team as a SoC DFT Verification Graduate Talent!
Embark on an exciting career journey with us.
As a Graduate Talent in SoC DFT Verification, you will have the opportunity to:
Design, develop and validate the Chipsets and SoC IPs for Intel's latest product, focusing on DFT and Debug.
Be trained and gain exposure to perform SoC design work such as RTL logic design in System Verilog, Verilog, or other Hardware description languages.
Perform validation of the Design for Testability (DFT) or Debugability (DFD) functionality of new architectural features of next generation designs by developing test plans, test content, coverage points, or test tools.
Collaborate with our stakeholders such as Structural Design, SoC RTL, Architecture/Microarchitecture, IP Design, Post-Silicon Manufacturing, and other teams to enable Intel products.
Qualifications:
Minimum Qualifications:
To be considered for this position, you must possess:
ABachelor's degreein Engineering or aMaster's degreein Electronic, Electrical, or Computer Engineering.
Preferred Qualifications (Plus Factors):
In addition to the minimum requirements, the following qualifications are highly desirable:
Familiarity withUNIX environmentsand proficiency inVerilogorC programming .
Experience withRTL integrationandvalidation methodologies .
Stronganalytical and debugging skills .
Excellent communication abilities to effectively engage with counterparts, key stakeholders, and cross-site partners.
Job Type:
Intel Contract Employee
Shift:
Shift 1 (Malaysia)
Primary Location:
Malaysia, Kulim
Work Model for this Role:
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.
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